Klyushin, 41, a resident of Moscow, Russia, was arrested in Sion, Switzerland on March 21, 2021, reportedly upon disembarking from his private jet while on vacation with his family.
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The US Attorney's Office of Massachusetts on Monday announced the extradition of Vladislav Klyushin, a Russian business executive with ties to the Kremlin, on charges of hacking US computer networks and committing securities fraud by trading on undisclosed financial data. And the Chinese cloud giant Alibaba has just open-sourced a bunch of RISC-V CPU designs. Meanwhile, MIPS has thrown its weight behind the RISC-V approach. Historically, Loongson chips have been developed around the MIPS architecture. Given China has been repeatedly accused of stealing intellectual property, Loongson said a "domestic third-party intellectual property evaluation agency" assessed that LoongArch is "obviously different" from architectures like Alpha, MIPS, Arm, POWER, RISC-V and x86. The chip also runs Linux variants including Loongnix, which is a fork of CentOS Linux OS. You can find LoongArch partially documented here, and we note that its instruction encoding at least isn't the same as MIPS, though with both being RISC ISAs, there are similarities.
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LoongArch's predecessor, the obviously MIPS64-based LoongISA, featured instructions to handle and accelerate the translation of x86 and Arm code into MIPS instructions, and it seems clear this technology has been carried over into LoongArch.
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The 3A5000 can be used to run x86 Windows software natively-ish: Loongson said it successfully implemented a translator that allows even Windows drivers to work transparently. "This is still the same antiquated, broken MIPS code, only with a different name." "You keep saying 'not MIPS,' and yet all I see is a blind copy of the MIPS code," said Marc Zyngier in a post to the Linux kernel board in late August. You keep saying 'not MIPS,' and yet all I see is a blind copy of the MIPS code LoongArch includes a reduced 32-bit version (LA32R), a standard 32-bit version (LA32S) and a 64-bit version (LA64)," Huacai said.Įarlier this year, a Linux kernel developer pointed out that the kernel code submitted by Loongson to support the 3A5000 and other LoongArch processors was very similar to the code used to drive MIPS systems, suggesting Loongson and MIPS were quite alike operationally. "LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V. It helps that MIPS and RISC-V are both quite, well, RISC-y, allowing Loongson to combine the two, along with a ton of custom instructions – some publicly documented and some not – to form LoongArch. It was suspected Loongson had taken parts of MIPS and RISC-V that it liked the most and melded them together into a hybrid architecture for the 3A5000. There has been much debate about the originality of LoongArch – the 3A5000's CPU core architecture – and Loongson's Huacai Chen said a few weeks ago in a memo to top Linux kernel developers that LoongArch is similar to MIPS and RISC-V.
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By that, it's believed the biz means that its CPU cores feature circuitry that aids in the emulation and binary translation of non-Loongson instruction sets, such as x86, into something that runs natively. The 3A5000 is "independently designed without foreign authorization, and it integrates x86, Arm and other international mainstream command systems," the chipmaker boasted. Yet they do provide a stepping stone for China to develop faster processors as the country cuts its reliance on foreign semiconductor suppliers. The chips have pretty standard features – table stakes, even – and won't strongly compete with what the x86 or Arm world has to offer.
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